1. Field of the Invention
The invention relates to electronic lamp ballasts which have been developed to meet the need for higher efficiency electric lighting with arc discharge lamps, and in particular for fluorescent lamps. Continuing development has caused much of the emphasis to shift from a simple "lumens per watt" approach to increasingly tight specification of other parameters. In particular, power companies desire improvement of power factor, including reduction of line current distortion (harmonics), and proposed standards require improved lamp current crest factor.
2. Description of the Prior Art
Electronic ballasts in common use all include a high frequency inverter, operated at a frequency high enough to minimize component size and improve lamp performance, yet not so high that radio noise becomes serious. Those intended for operation from a commercial AC power line usually include a full-wave rectifier, an energy storage capacitor from which the inverter is supplied, and a resonance circuit for connecting the lamps to the inverter. The earlier ballasts of this type had an electrolytic capacitor connected directly across the output of a full-wave bridge rectifier, which supplied 120 relatively short current pulses per second to the capacitor. As a result the line current had a very large harmonic current content. At the same time, the voltage across the energy storage capacitor had a relatively large ripple voltage which caused the amplitude of the high frequency lamp current to vary excessively, with a crest factor greater than 1.7.
In ballasts of this type the inverter frequency is usually not tightly controlled; commonly the inverter is "self-triggering" so that the frequency is relatively constant at a value around 30 kHz. To reduce the harmonic currents drawn from the power line, and improve the lamp crest factor, various DC boost circuits have been proposed, which involve taking high frequency power from the inverter, rectifying it and storing it, to help supply the inverter at least during periods of the input power line half cycle when the voltage is relatively low. These circuits have had the common property of being relatively complex and costly; for example, they often require a separate transformer winding, rectifier diodes, and an additional electrolytic capacitor. A different kind of boost circuit is shown in U.S. Pat. No. 5,001,400, which teaches use of a high-frequency-driven inductive-discharge "forward converter" to reduce power line current harmonic distortion.
Recently, to obtain circuit simplicity while still minimizing power line harmonics, connections have been proposed directly from the high frequency circuit to a node between the power line rectifier and an isolating diode through which all current to the energy storage capacitor flows.
U.S. Pat. No. 4,782,268 shows one such circuit. Circuit behavior is not easily described mathematically, but can be described qualitatively as follows: A relatively steady high voltage is maintained on main storage capacitor C4, and is converted into a high frequency square wave by an inverter formed by transistors T1 and T2. This high-frequency square wave is applied from a node M1 to the lamp circuit and to a coupling capacitor C7 which is connected to a node M2 between two diodes. These diodes are in series between the rectifier bridge and the storage capacitor C4, and are polarized in the direction of current flow from the rectifier bridge to the capacitor C4.
During a portion of the high-frequency cycle at node M1, the voltage at node M2 falls below the rectified power line voltage, and current flows from the bridge rectifier and input capacitor C2 through the diode D4 to coupling capacitor C7. Isolating diode D5 is a fast recovery diode which prevents current backflow from the main storage capacitor C4. During another portion of the high-frequency cycle at M1, the voltage at M2 rises above the voltage on the storage capacitor C4, and current flows from capacitor C7 through diode D5 to charge capacitor C4. When the power line voltage is near its peak, a large pulse of current is drawn through diodes D4 and D5, fully charging capacitor C4, as shown in FIGS. 4a and 4b. of the '268 patent. During this period there can be no significant high frequency current flow through capacitor C2.
A further capacitor C8, whose value is substantially smaller than C7, provides coupling from node M2 to the lamp circuit. The value of this capacitor is chosen to make the line current more sinusoidal.
This high-frequency charging circuit provides a great improvement over conventional capacitor-input filters, but still does not reduce line harmonics or lamp crest factor sufficiently. For example, to flatten the current spike shown in FIG. 4a, the patent teaches use of a relatively large 0.6H line choke L2, producing the current waveform of FIG. 4b. To minimize harmonic line currents, operation at 25 to 50 kHz is suggested.
Still more recently, published PCT application WO 92/04808 discloses a ballast circuit for a compact fluorescent lamp which has an isolating diode similar to that in the '268 patent, but a different feedback connection. The lamp current circuit itself is connected between the inverter output and the node between the power line rectifier and the isolating diode. A capacitor C3, having a value about 0.047 .mu.f, causes line current to be drawn during those portions of the input rectified voltage waveform when the rectified voltage is less than the voltage across the main storage capacitor. However, as shown in FIG. 4, the line current has a substantial spike near the peak of the voltage, when line current is being drawn directly as charging current for the main storage capacitor, so that line current still has an undesirably high harmonic content. The inverter is self-triggering, so there is no particular control of the inverter frequency.
Showing a different approach to control of electronic ballasts, U.S. Pat. No. 4,682,082 describes a circuit especially adapted for driving a neon lamp, in which the on and off periods of one of the transistors are controlled to be different. This invention minimizes a problem encountered with high frequency operation: the production of striations or bubbles in the gas plasma within the lamp.
When a main storage capacitor is placed directly across the output of a power line bridge rectifier, the value of this capacitor is a compromise. A very high capacitance produces a fairly low voltage ripple between charging pulses, but these pulses are sharp and generate very large line harmonic currents. A smaller capacitance reduces these harmonics, but the ripple voltage causes the lamp crest factor to become excessive.
As taught in U.S. Pat No. 3,611,021, it was recognized at least as early as 1970 that the lamp current of an electronic-ballasted fluorescent lamp could be stabilized by sensing the lamp current, and varying the frequency of a ballast inverter in a direction to reduce the lamp current variation. In this circuit, the operating frequency is below the starting frequency, and frequency is reduced in order to decrease lamp current.
Lamp current variation can be particularly severe when a high frequency ballast is used with a high pressure gas discharge lamp. U.S. Pat. No. 4,471,269 teaches use of a relatively small (.ltoreq.1 .mu.f) storage capacitor, so that the high frequency lamp current would vary widely over the course of one half cycle of the power line voltage. To correct for this, the inverter switching frequency is modulated by comparing the instantaneous line current with the instantaneous line voltage, and using the difference signal to control the frequency of the inverter. The inverter frequency is raised to a peak when the line voltage is at its peak, and the inverter frequency is at its minimum when the line voltage is near crossover. Thus frequency is varied in direct proportion to rectifier output voltage.
U.S. Pat. No. 4,862,040 teaches use of a complex circuit and structure for modulating the inverter frequency of a fluorescent lamp ballast, to compensate for variations in lamp current which would result from ripple voltage on the storage capacitor. The inverter's output has a frequency averaging about 30 kHz. A complex saturable transformer varies the inverter frequency as a function of the instantaneous magnitude of the DC supply voltage to the inverter. Starting with an unmodulated frequency of about 25 kHz, for a .+-.30% ripple voltage the frequency averages about 30 kHz. This correction circuit raises the inverter frequency when the line voltage, and the DC bus voltage, are at their peak.
U.S. Pat. No. 4,873,471 teaches yet another technique for reducing the harmonic content of line current and the lamp crest factor. This relatively complex circuit does not contain a main energy storage capacitor. Rather, during approximately 2/3 of each half-cycle of power line frequency, the rectified sinusoid voltage is applied to the inverter circuit. The inverter frequency is varied approximately linearly with the voltage supplied to the inverter (high frequency at the high point of the line voltage), so that the lamp current remains approximately constant. During this same time, a make-up power source, containing a relatively large secondary storage capacitor, is charged from a bridge rectifier driven from a secondary winding on the inverter transformer. During the "inter-cusp period" of the rectified line voltage, the inverter draws power from the secondary storage capacitor, which has such a value that its voltage drops little during this period; and the inverter frequency remains relatively constant at its minimum value.